The trend of dramatically increasing the embedded electronics content of automobiles, elevators, jet engines, and other traditionally electro-mechanically controlled systems is accompanied by a proliferation of subsystems having separate central processing units (CPUs). The demand for a means of communication to coordinate action among multiple CPUs is driving the increased reliance on chip-based communication protocols. Known formally as a binary countdown circuit, a counter is an integrated circuit that is often used to provide protocol for wired or wireless communication systems such as local area networks (LANs) and wide area networks (WANS).

View a high magnification image of a binary countdown chip.

Protocol chips are embedded in the medium access control (MAC) mechanism, the heart of the digital communications network. The MAC determines how the network resources (wire, fiber or RF frequency) will be shared among nodes. Its determinism, efficiency, prioritization, and protocol optimizations set bus traffic and system performance. The protocol chips that define the medium access control system set bandwidth message delivery times through priorities and robustness considerations. Many of the counter processors are marketed as programmable for network developers and special applications.

In a binary countdown protocol, a station trying to seize the channel, broadcasts its address as a binary bit string (4 digits), starting with the high-order bit. All addresses from the other stations are Boolean "OR-ed" together in parallel. Then, beginning with the highest-order bit, if a station detects a higher bit in the address mask, it yields the channel. In this manner, multiple users efficiently share a network or ring, with the "bidding" game repeated after each transmission (broadcast period). Binary countdown protocol is better than using the basic bitmap, because of its added efficiency (short contention time) and it doesn't need to grow as the network grows.

Alternatives to the collision-free binary countdown system are collision-based (time-multiplexed) and token-based implicit/explicit scenarios. Binary countdown, known also as bit dominance protocol, is best suited for systems lacking a central controller node. It also allows a moderately large number of message types and provides an arbitration overhead constant, and global prioritization. To avoid collisions, stations make reservations for the channel beforehand during the contention period. However, there is no mechanism for fairness with higher addressed stations having built-in priority. One solution is to use virtual addresses for stations with a station switching to the lowest address after a successful transmission.

---

BACK TO THE INTEGRATED CIRCUIT IMAGE GALLERY

BACK TO THE DIGITAL IMAGE GALLERIES

Questions or comments? Send us an email.

© 1995-2022 by Michael W. Davidson and The Florida State University. All Rights Reserved. No images, graphics, software, scripts, or applets may be reproduced or used in any manner without permission from the copyright holders. Use of this website means you agree to all of the Legal Terms and Conditions set forth by the owners.

This website is maintained by our
Graphics & Web Programming Team
in collaboration with Optical Microscopy at the
National High Magnetic Field Laboratory.

Last Modification Friday, Nov 13, 2015 at 02:19 PM

Access Count Since September 17, 2002: 12970

Visit the website of our partner in introductory microscopy education: