Allen-Bradley chip designers usually place a copy of the company logo, and often the designers' initials, within an empty spot on the masks during the layout phase. We captured both the AB logo (drawn by Greg Ehmann of VLSI Technology) and a set of initials in the photomicrograph above, which also contains one of the world's smallest trains in the upper right-hand corner. This integrated circuit is a "standalone" ASIC fabricated in 1994 by VLSI Technology that incorporates the logic contained in the "Coreless" chip plus a RISC processor and its accompanying RAM and ROM. The designers who contributed to this chip and are listed in the photomicrograph are:

• Features/Functions Definition: Ken Harris, Thomas Sugimoto, Dennis Wright
• Main Architecture Team: Jack Calderon, Alan Cribbs, Dennis Dombrosky, Madge Hutz, Dave Karpuszka, Tim Murphy, Bob Weppler
• Logic Design: Madge Hutz, Dave Karpuszka, Tim Murphy, Marian Tapu, Bob Weppler
• Firmware: Steve Blech, Alan Cribbs, Ken Harris, Dave Karpuszka, Thomas Sugimoto, Bob Weppler
• Layout: Tim Murphy
• Simulation/Testing: Jerome Saint-Cyr, Yefim Vayl