VTC has designed most of the PA-RISC processors since the architecture was launched in the mid 1980s. The following table outlines the more recent chips.

Processor	Intro Date	Transistors	Die Size	Frequency
PCX		360K	14.2 x 14.2 mm	50 MHz
PCX-S		490K	14.2 x 14.2 mm	50/66 MHz
PA-7100/PA-7150	11/92	850K	14.2 x 14.2 mm	99/125 MHz
PA-7100LC		900K	14.2 x 14.2 mm	60/80/100 MHz
PA-7200		1.31M		100/120 MHz
PA-7300LC	9/96	9,237,365	15.3 x 17.0 mm	132/160/180 MHz
PA-8000	6/96	4.5M	17.7 x 19.6 mm	160/180 MHz
PA-8200	5/97	4.5M	17.7 x 19.6 mm	200/240 MHz
PA-8500	9/98	140M	21.3 x 22 mm	360/440/500 MHz

For more details of these PA-RISC processors follow some of these links.

• PA-RISC processor links


• PA-7300LC
  • White Papers
  • Hewlett Packard Journal articles
  • HP Unveils PA-RISC Microprocessor with Highest Level of System Integration
• PA-8000
• PA-8000 Press Releases and White Papers
• Hewlett Packard Journal articles
• PA-8200
• MicroProcessor Report Article Reprint
• HP's Latest PA-RISC Microprocessor Evolution Enables 50 Percent Application Performance Boost -- Highest Spec95 Performance of all Available Chips
• PA-8500
• HP Unveils Third-generation 64-bit PA-8500 Processor
• PA-8500: The Continuing Evolution of the PA-8000 Family
• HP Unveils High-Performance PA-8500 Processor-based Board Upgrades for HP Visualize Workstations

Hewlett Packard is also collaborating with Intel on the development of EPIC technology and the IA-64 architecture. For more information follow these links.

• IA-64 links
  • Microprocessor Roadmap PA-RISC to IA-64
  • PA_RISC and IA-64
  • IA-64 Overview
  • IA-64:Post-RISC Leadership
  • IA-64 at Microprocessor Forum '97
    • HP's Joel Birnbaum's Microprocessor Forum Presentation: Two Decades of Architecture Innovation at HP
    • The Next Generation of Microprocessor Architecture: A 64-Bit Instruction Set Architecture (ISA) Based Technology