Mask Alignment Errors

Mask Alignment Errors

Mask alignment errors can have catastrophic effects on the performance of integrated circuits, often rendering them incapable of operating. A device that has a minimum line width between 1 and 1.5 microns can only tolerate a variation of 0.25 microns with respect to the alignment of masks without encountering greatly increased device failure rates. The Wright brother's airplane in the photomicrograph above resides on a NCR Microelectronics memory integrated circuit that was manufactured in the mid 1970s. This particular chip (wafer) has a severe mask misalignment that approaches 50 microns, resulting in the wing-support struts and landing skids being out of alignment with the wings. In other words, this bird won't fly. Obviously, the entire wafer is defective and was discarded from the lot midway through the fabrication run. The letters VCC to the right of the biplane indicate the future position of a bonding pad that will supply voltage to the chip. A version of this airplane with proper mask alignment is illustrated as "Air Force One" elsewhere in the Silicon Zoo. The wafer from which this photomicrograph was derived was donated to the zookeepers by Greg O'Hara from Marietta, Georgia.


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